Hardware accelerated SIMD-based primitives. [Edit]

Remarks

Important: the Mono.Simd assembly is a work-in-progress API and has not been finalized. We are publishing the assembly and the documentation hoping to get input and feedback from the community.

The Mono.Simd namespace provides a number of classes that are hardware accelerated by mapping the classes and the actual operations to native SIMD instructions on a processor.

When the Mono runtime's SIMD optimization are active the operations on the structures defined in this namespace are mapped to hardware operations which can improve the performance of your graphics, multimedia or 3D operations significantly.

Code that uses the types defined in the Mono.Simd assembly will work even on systems that do not have hardware SIMD operations, systems where Mono has not added support for the native SIMD operations and even on the Microsoft.NET runtime as it currently does not have support for hardware accelerated SIMD operations.

You can control whether the runtime will map the operations to SIMD primitives by using the -O command line option and specifying -O=simd to enable or -O=-simd to disable.

The operations that are hardware accelerated are flagged with the Acceleration attribute on each individual method. The Mode property describes the minimum version of CPU functionality required to use the operation. Software can use this flag to determine if they want to use the operations implemented in software or not.

Casting operations are also cheap, converting from one data type to another have a very low cost. This is useful to move information back and forth from floating point values to integers.

[Edit]

Classes

Type	Reason
AccelerationAttribute	Documents the minimal hardware requirements for an operation to be hardware accelerated .
ArrayExtensions	Documentation for this section has not yet been entered.
SimdRuntime	Methods to probe for SIMD support.
VectorOperations	Extension methods to Vector types.

Structs

Type	Reason
Vector16b	A vector with sixteen bytes.
Vector16sb	A vector with sixteen signed bytes.
Vector2d	A vector with two doubles.
Vector2l	A vector with two longs.
Vector2ul	A vector with two unsigned longs.
Vector4f	A vector with four floating point values.
Vector4i	A vector with four integers.
Vector4ui	A vector with four unsigned integers.
Vector8s	A vector with eight shorts.
Vector8us	A vector with eight ushorts.

Enumerations

Type	Reason
AccelMode	Flags to encode SIMD acceleration requirements.
ShuffleSel	Determines how values are propagaged on initialization.